Dr. Tehranipoor to Receive IEEE Meritorious Service Award

Assistant professor of Electrical & Computer Engineering (ECE) Mohammad Tehranipoor has been chosen to receive the 2008 IEEE Computer Society Meritorious Service Award. He was selected for his contributions toward effectively planning a number of IEEE workshops and symposia in 2007 and 2008. Dr. Tehranipoor initiated the IEEE International Workshop on Hardware-Oriented Security and Trust (HOST-2008) and served as the general chair and chair of the steering committee. He also served as program chair for the IEEE International Defect-Based Testing Workshop (DBT-2007), program chair for IEEE Defect and Data Driven Testing (D3T-2008), and co-program chair for IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT-2008). He is reprising his role as general chair for all three programs during 2009.

Dr. Tehranipoor will formally receive the award during the IEEE VLSI Test Symposium (VTS-2009) May 3-7, 2009 in Santa Cruz, CA. It was pre-announced during the International Test Conference (ITC-2008).

Commenting on Dr. Tehranipoor’s award, Dr. Peter Luh, ECE department head and SNET Professor of Communications and Information Technologies, said “This award highlights Mohammad’s impressive level of involvement at the international level in organizing professional workshops and symposia. This also reflects his pioneering effort and the recognition received in the emerging areas of hardware-oriented security and trust, for otherwise, this degree of professional leadership is unusual so early in a young academic’s career. We applaud Mohammad for his thoughtful leadership and achievement.”

Dr. Tehranipoor received his doctoral degree from the University of Texas – Dallas in 2004 and joined UConn in 2006. He has garnered a number of Best Paper awards and is a frequent invited speaker based on his work involving secure integrated circuits, design for testability, and signal and power integrity in nanometer designs. His research interests include computer-aided design and testing, design-for-testability, delay fault testing, test resource partitioning, secure design, IC trust, and CAD/testing and defect tolerance for nanoscale devices. To learn more about Dr. Tehranipoor’s research, please visit his website.